Jitter suppression circuit
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United States of America Patent
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Nov 9, 2010
Issued Date -
N/A
app pub date -
Sep 18, 2007
filing date -
Mar 18, 2005
priority date (Note) -
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Abstract
In a circuit suppressing jitters without a synchronizing clock signal and an increase of a circuit scale, input data is regenerated by a data regeneration circuit in a broadband, a predetermined signal pattern which generates phase deviations exceeding a predetermined value is detected from the data regenerated by the data regeneration circuit by a pattern detection circuit, a reverse phase deviation signal having reverse phase deviations of phase deviations corresponding to the predetermined signal pattern is generated by a reverse phase deviation generating circuit, and an output signal of the data regeneration circuit is canceled by a phase deviation correcting circuit with the reverse phase deviation signal.
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