Method of forming contact holes of reduced dimensions by using in-situ formed polymeric sidewall spacers
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United States of America Patent
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Apr 20, 1999
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N/A
app pub date -
Nov 13, 1996
filing date -
Nov 13, 1996
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Abstract
A method of forming cavities in a non-conducting layer on a semiconductor device is provided which can be carried out by first providing a pre-processed semi-conducting substrate which has a non-conducting layer and a patterned photoresist layer sequentially deposited and formed on top, and then conformally depositing a polymeric material layer on top of the non-conducting and the photoresist layer, and then etching the polymeric material layer to form polymeric sidewall spacers on the patterned photoresist layer, and then etching cavities in the non-conducting layer to expose the semi-conducting substrate. The polymeric sidewall spacers formed on the sidewalls of the photoresist openings allow the fabrication of cavities such as contact holes or line spacings of reduced dimensions while utilizing a conventional low cost photolithographic method for patterning.
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