Analog to digital converter with a calibration circuit for compensating for coupling capacitor errors, and a method for calibrating the analog to digital converter
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United States of America Patent
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Mar 16, 2004
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app pub date -
Nov 12, 2002
filing date -
Nov 12, 2002
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Abstract
An ADC (1) of balanced architecture for determining a digital word corresponding to a sampled voltage of an input signal from an input line (33) comprises a first capacitor circuit (2) comprising a most significant capacitor array (4) and a least significant capacitor array (5) which are capacitively coupled by a coupling capacitor C.sub.c1. A second capacitor circuit (29) coupled to ground balances the first capacitor circuit (2). A differential comparator 27 compares the voltage on the first capacitor circuit (2) with that on the second capacitor circuit (29). A SAR (42) responsive to the output of the differential comparator (27) outputs switch bits to a main switch network (32) for selectively switching the capacitors of the first capacitor circuit (2) to respective high and low voltage reference lines (34) and (35) until the voltage on first and second inputs (26) and (28) of the differential comparator (27) are equal for determining the digital word corresponding to the sampled voltage on the input line (33). A first calibration circuit (49) for calibrating the coupling capacitor (C.sub.c1) for compensating for under or over capacitance of the coupling capacitor C.sub.c1 comprises a plurality of binary weighted first calibrating capacitors (51) to (56) which are coupled by a calibration coupling capacitor C.sub.4 to the least significant capacitor array (5). A first calibration switch network (57) is provided for selectively coupling the first calibrating capacitors (51) to (56) to either the second input (28) of the differential comparator (27), the first input (26) of the differential comparator (27), or ground. By coupling appropriate ones of the first calibrating capacitors (51) to (56) to the second input (28) of the differential comparator (27) over capacitance of the coupling capacitor (C.sub.c1) is compensated for, and under capacitance is compensated for by coupling appropriate ones of the first calibrating capacitors (51) to (56) to the first input (26) of the differential comparator (27).
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Patent Owner(s)
- ANALOG DEVICES, INC.
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Hurrell, Christopher Peter | Cookham, GB | 44 | 425 |
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Fee | Large entity fee | small entity fee | micro entity fee | due date |
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Fee | Large entity fee | small entity fee | micro entity fee |
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Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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