Importance

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Abstract

A circuit, system, and method are provided for regulating the mark-to-space ratio of a clocking signal. In instances where the mark-to-space ratio is targeted at 1:1 (i.e., a 50% duty cycle), then a regulated signal is formed which will produce a 50% duty cycle whenever that regulated signal is forwarded to a buffer which will produce a duty cycle other than 50% if the input signal were not regulated. The regulated signal is derived from a feedback circuit which will take into account the periodic nature of the clocking signal and whatever threshold skews might be attributable to the clock buffer. The feedback signal derives its input from a tap connected to receive the clocking signal from an output of the buffer, and the tap forwards that clocking signal to switching transistors which impute the periodic clocking frequency onto a threshold skewed output which will then form the regulated signal. Any skew resulting from the oscillator will not be passed to the node which bears the regulated signal. Instead, only the AC coupled portion of the oscillating signal will be coupled.

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First Claim