Importance

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Abstract

There is provided a test apparatus having a plurality of test modules for supplying test patterns used in testing devices under test to the devices corresponding to a given timing signal, a reference clock generating section for generating a reference clock, a plurality of timing supply sections, provided corresponding to the plurality of test modules, for generating the timing signal corresponding to the reference clock and supplying the timing signal to the corresponding test module, respectively, and a control section for controlling timing for outputting the timing signal output by the timing supply section so that timing of the respective test patterns output by the plurality of test modules is practically equalized based on a test module delay of each test module until when it outputs the test pattern after receiving the timing signal.

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First Claim