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Abstract

A turbo-code decoder includes a first reception signal memory, second reception signal memory, a priori memory, first adder, first selector, and second selector. The first reception signal memory stores an information sequence. The second reception signal memory stores first and second parity sequences. The a priori memory stores extrinsic/previous information in repetitive processing. The first adder adds the information sequence read out from the first reception signal memory and the previous information read out from the a priori memory. The first selector selects one of the first and second parity sequences read out from the second reception signal memory. On the basis of a polarity of a calculation result from the first adder and that of a selection output from the first selector, the second selector selects one of the sum from the first adder including a negative polarity, the selection output from the first selector including a negative polarity, a sum of the sum and selection result, and zero. An a metric and .beta. metric are calculated on the basis of an output from the second selector.

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First Claim