Analog switch
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Sep 18, 2007
Grant Date -
Jun 30, 2005
app pub date -
Nov 8, 2004
filing date -
Dec 24, 2003
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
An analog switch has a first circuit and a second circuit. The first circuit has an NMOS and PMOS connected in series, and the second circuit has a PMOS and NMOS connected in series. The first and second circuits are provided in parallel between an input terminal and output terminal of the analog switch. The gate of each NMOS is connected to a terminal to which a first clock signal is supplied, and the gate of each PMOS is connected to another terminal to which a second clock signal is supplied. The second clock signal is a reversal of the first clock signal. When the analog switch is set to the OFF state and a voltage that is above the supply potential is applied to the input terminal, the NMOSs become reverse-biased diodes. Therefore, an off leak current is not produced.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully