LDMOS transistors including vertical gates with multiple dielectric sections, and associated methods

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 11316044
APP PUB NO 20180350980A1
SERIAL NO

15997997

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Abstract

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A lateral double-diffused metal-oxide-semiconductor transistor includes a silicon semiconductor structure and a vertical gate. The vertical gate include a (a) gate conductor extending from a first outer surface of the silicon semiconductor structure into the silicon semiconductor structure and (b) a gate dielectric layer including a least three dielectric sections. Each of the at least three dielectric sections separates the gate conductor from the silicon semiconductor structure by a respective separation distance, where each of the respective separation distances is different from each other of the respective separation distances.

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Patent Owner(s)

Patent OwnerAddress
MAXIM INTEGRATED PRODUCTS INCCALIFORNIA USA CALIFORNIA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Brand, Adam Palo Alto, US 31 611
Castro, Tom K Santa Clara, US 5 5
Fatemizadeh, Badredin Palo Alto, US 26 173
Ni, Chi-Nung Foster City, US 7 105
Singh, Rajwinder Pleasanton, US 13 79
Xia, John Fremont, US 12 73
Zuniga, Marco A Berkeley, US 80 1653

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