Network packet buffer allocation optimization in memory bank systems
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United States of America Patent
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Jan 2, 2007
Issued Date -
N/A
app pub date -
Mar 29, 2005
filing date -
Jan 8, 2003
priority date (Note) -
Expired
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Abstract
An arrangement of buffer in a memory unit including a plurality of memory banks may store information in rows that span the memory banks. Moreover, a processor may be adapted to (i) establish a plurality of buffers to be associated with the memory unit, wherein the size of each buffer is less than the width of a memory bank, and (ii) arrange for a selected buffer to begin in a memory bank other than a memory bank in which a previously selected buffer begins.
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