Semiconductor memory device and memory system including the same
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United States of America Patent
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Jun 27, 2023
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N/A
app pub date -
Oct 19, 2021
filing date -
Dec 10, 2020
priority date (Note) -
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Abstract
A memory system includes: a memory device including at least one bank; and a memory controller suitable for: dividing the bank into a plurality of sub-regions according to an active address, generating an aging signal for the bank based on a plurality of counting values generated by counting a number of inputs of an active command for each of the sub-regions, and providing the active command, the active address, the aging signal, and a target refresh command, wherein the memory device is suitable for: generating a sampling address by sampling the active address according to the active command, and performing a target refresh operation on a word line corresponding to the sampling address according to the target refresh command while adjusting a refresh period of the bank according to the aging signal.
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