Instruction fetch using a return prediction circuit
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United States of America
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Mar 26, 2024
Grant Date -
N/A
app pub date -
Jun 9, 2022
filing date -
Jun 9, 2022
priority date (Note) -
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status (Latency Note)
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Abstract
An apparatus includes a processor circuit that includes a return address stack circuit, a return prediction circuit, and a fetch control circuit. The return prediction circuit is configured to store, for previously accessed return addresses, fetch parameters for next fetch addresses. The fetch control circuit is configured to in response to a fetch of a call instruction, push a return address onto the return address stack circuit. In response to a fetch of a return instruction that corresponds to the call instruction, the fetch control circuit is further configured to retrieve the return address from the return address stack circuit, and to create, using the return address and fetch parameters retrieved from the return prediction circuit, a next fetch request to retrieve instructions subsequent to the return instruction.
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