Digital phase locked loop for correcting a phase of an output signal with respect to an input signal
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United States of America Patent
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-
Oct 8, 1991
Grant Date -
N/A
app pub date -
Jan 12, 1990
filing date -
Jan 12, 1989
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A digital phase locked loop for correcting the phase of an output signal with respect to an input signal has a phase comparator for comparing the phases of the input signal and a feedback signal from a variable frequency oscillator. The output signal of the phase comparator representing the phase difference is integrated in a low pass filter. The output of the low pass filter is supplied to a switch which alternately selects between the output of the low pass filter and a zero level signal from a zero generator. The output of the switch is supplied to the variable frequency oscillator. The output signal of the variable frequency oscillator is returned to the phase comparator, so that the phase of the output signal from the variable frequency oscillator is synchronized with the phase of the input signal.
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