Semiconductor fabrication process employing stress inducing source drain structures with graded impurity concentration

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United States of America Patent

PATENT NO 7238580
APP PUB NO 20060166492A1
SERIAL NO

11043577

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Abstract

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A semiconductor fabrication process has recessed stress-inducing source/drain (SISD) structures that are formed using a multiple phase formation process. The SISD structures are semiconductor structures having a lattice constant that differs from a lattice constant of the semiconductor substrate in which the source/drain structures are recessed. The SISD structures preferably include semiconductor compound having a first element (e.g., silicon) and a second element (e.g., germanium or carbon). The SISD structure has a composition gradient wherein the percentage of the second element varies from the upper surface of the source/drain structure to a lower surface of the SISD structure. The SISD structure may include a first layer with a first composition of the semiconductor compound underlying a second layer with a second composition of the semiconductor compound. The second layer may include an impurity and have a higher percentage of the second element that the first layer.

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Patent Owner(s)

  • NXP USA, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Adams, Vance H Austin, TX 16 227
Liu, Chun-Li Mesa, AZ 61 453
Orlowski, Marius K Austin, TX 68 2050
Stoker, Matthew W Mesa, AZ 27 248

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