Complementary energy path adiabatic logic
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United States of America Patent
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Jun 29, 2010
Grant Date -
Mar 25, 2010
app pub date -
Sep 24, 2008
filing date -
Sep 24, 2008
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Abstract
A complementary energy path adiabatic logic (CEPAL) includes an evaluation network and a power clock network. The evaluation network is a logic circuit composed of P-type MOS transistors and N-type MOS transistors. The power clock network includes a P-type and N-type MOS transistors and additional P-type and N-type MOS transistors, with each of the transistors involved in the power clock network acting as an active diode.
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