Switched-capacitor amplifier circuit
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United States of America
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Dec 28, 2021
Grant Date -
Dec 30, 2021
app pub date -
Jun 30, 2020
filing date -
Jun 30, 2020
priority date (Note) -
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status (Latency Note)
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Abstract
A switched-capacitor amplifier circuit includes multiple switched-capacitor networks, an amplifier, and multiple reset circuits. The switched-capacitor networks are configured to receive respective input voltages during a sampling phase, and generate sampled voltages. During an amplification phase, the amplifier is coupled with the switched-capacitor networks, and is configured to receive the sampled voltages. The amplifier is further configured to generate output voltages. During the sampling phase, the amplifier is coupled with the reset circuits, and is further configured to receive divided voltages such that the amplifier is reset. The reset circuits are configured to receive and provide a common-mode voltage and the output voltages to the amplifier. The divided voltages are generated based on the common-mode voltage and the output voltages. Each reset circuit includes at least one of a resistor and a capacitor.
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