Semiconductor package
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United States of America Patent
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Feb 13, 2024
Grant Date -
N/A
app pub date -
Jun 23, 2021
filing date -
Oct 29, 2020
priority date (Note) -
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status (Latency Note)
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Abstract
A semiconductor package includes a first semiconductor chip including a first wiring layer including a first wiring structure and providing a first rear surface, and a first through via for first through via for power electrically connected to the first wiring structure; and a second semiconductor chip including a second wiring layer including a second wiring structure and providing a second rear surface, and a second through via for second through via for power electrically connected to the second wiring structure, wherein the first and second semiconductor chips have different widths, wherein the first semiconductor chip receives power through the first wiring structure and the first through via for first through via for power, wherein the second semiconductor chip receives power through the second wiring structure and the second through via for second through via for power.
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