Multi-bit memory storage device

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United States of America Patent

PATENT NO 11869971
APP PUB NO 20230120760A1
SERIAL NO

18066689

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A FeFET configured as a 2-bit storage device that includes a gate stack including a ferroelectric layer over a semiconductor substrate; and the ferroelectric layer includes dipoles; and a first set of dipoles at the first end of the ferroelectric layer has a first polarization; and a second set of dipoles at the second end of the ferroelectric layer has a second polarization, the first and second polarizations of the corresponding first and second sets of dipoles representing storage of 2 bits, wherein a first bit of the 2-bit storage device being configured to be read by application of a read voltage to the source region and a do-not-disturb voltage to the drain region; and a second bit of the 2-bit storage device being configured to be read by application of the do-not-disturb voltage to the source region and the read voltage to the drain region.

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Patent Owner(s)

  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chia, Han-Jong Hsinchu, TW 159 235
Huang, Chia-En Hsinchu, TW 241 331
Lin, Meng-Han Hsinchu, TW 260 259
Liu, Martin Hsinchu, TW 17 152
Wang, Yih Hsinchu, TW 238 706
Yeong, Sai-Hooi Hsinchu, TW 432 893

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