Integrated circuit and manufacturing method therefor
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United States of America Patent
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Mar 16, 2004
Grant Date -
Apr 24, 2003
app pub date -
Oct 17, 2002
filing date -
Oct 19, 2001
priority date (Note) -
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status (Latency Note)
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Abstract
An integrated circuit is manufactured by providing a P.sup.- or P.sup.--type semiconductor substrate with a resistivity of 10 to 1000 .OMEGA..multidot.cm, disposing a CMOS on top of the semiconductor substrate, depositing an insulating film with several wirings embedded therein over the CMOS, and disposing an inductor on top of the insulating film in a region that is apart from where the CMOS is positioned. A p.sup.+ type diffused layer with a resistivity of about 0.01 .OMEGA..multidot.cm is disposed between the semiconductor substrate and the CMOS.
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