Importance

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Abstract

A circuit for regulating a signal, such as a cathode current. The circuit has an input stage for inputting a signal and for producing a sense signal based thereon. The circuit may input timing signals and have a first stage for comparing a first reference signal with the sense signal when a first timing signal indicates and for outputting a first correction signal based on the comparison. The circuit may have a second stage for comparing a second reference signal with the sense signal when a second timing signal indicates and for outputting a second correction signal based on the comparison. The circuit may further have elements for measuring a leakage signal in the input signal during a third time interval. In this embodiment, the first and second stages are further for subtracting the leakage signal from the sense signal prior to the comparisons.

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First Claim