Bias circuit for a MOS device
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United States of America Patent
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May 3, 2011
Grant Date -
Feb 4, 2010
app pub date -
Jul 31, 2008
filing date -
Jul 31, 2008
priority date (Note) -
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Abstract
A method and circuit for providing a bias voltage to a MOS device is disclosed. The method and circuit comprise utilizing at least one diode connected circuit to provide a voltage that tracks process, voltage and temperature variations of a semiconductor device. The method and circuit includes utilizing a current mirror circuit coupled to the at least one diode connected circuit to generate a bias voltage for the body of the semiconductor device from the voltage. The bias voltage allows for compensation for the process, voltage and temperature variations.
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