Configurable memory termination
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United States of America Patent
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Jul 26, 2022
Grant Date -
N/A
app pub date -
Oct 22, 2019
filing date -
Oct 22, 2019
priority date (Note) -
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status (Latency Note)
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Abstract
Methods, systems, and devices for configurable memory termination are described. In one example, a memory system, such as a memory module or a memory assembly, may include one or more memory devices (e.g., memory arrays, memory chips), and an input/output circuit coupled with the one or more memory devices and for communicating over a channel. The memory system may also include a selection component operable to selectively isolate the input/output circuit from one or more signal paths of the channel based at least in part on receiving a signal from a host device. In some examples, the selection component may be operable to selectively couple the one or more signal paths of the channel with one or more termination resistance elements.
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