Field programmable gate array
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United States of America Patent
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Aug 2, 2005
Issued Date -
N/A
app pub date -
Aug 15, 2003
filing date -
Aug 15, 2003
priority date (Note) -
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Abstract
A field programmable gate array (FPGA) having hierarchical interconnect structure is disclosed. The FPGA includes logic heads that have signals routed therebetween by the interconnect structure. Each logic head includes a plurality of cascadable logic blocks that can perform combinatorial logic. The logic head can further be fractured into two independent logical units.
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