Control of large scale topography on silicon wafers
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United States of America Patent
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Jun 7, 1994
Grant Date -
N/A
app pub date -
Oct 9, 1991
filing date -
Oct 9, 1991
priority date (Note) -
Expired
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Abstract
A method for the characterization of large scale wafer topography is applied to improving yields in the manufacture large scale integrated (LSI) devices. First, the heights at the center, the edge and an intermediate point are measured on eight equally spaced radii. This provides eight values each for Y.sub.s and Y.sub.e which are averaged. Then the shape angle .alpha. is computed using the following equation: ##EQU1## The shape magnitude M is also computed using the following equation: ##EQU2## The thus computed values of .alpha. and M are correlated with individual wafer characteristics as to device performance and yield. Based on these results, the wafer processing is controlled to provide optimal wafer yield and isolation characteristics.
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