Semiconductor memory device having planarized upper surface and a SiON moisture barrier
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United States of America Patent
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Jun 28, 2005
Grant Date -
N/A
app pub date -
Jun 15, 2000
filing date -
Jun 17, 1999
priority date (Note) -
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Abstract
There is provided a semiconductor device which is manufactured via steps of forming a capacitor which is obtained by forming in sequence an upper electrode, a dielectric film formed of ferroelectric material or high-dielectric material, and a lower electrode on a semiconductor substrate, then forming an interlayer insulating film on the capacitor, then planarizing a surface of the interlayer insulating film by the CMP polishing, then removing a moisture attached to a surface of the interlayer insulating film or a moisture contained in the interlayer insulating film by applying the plasma annealing using an N2O gas, and then forming a redeposited interlayer film on the interlayer insulating film.
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