Semiconductor memory device and method for reading data
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United States of America Patent
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Apr 9, 1996
Grant Date -
N/A
app pub date -
Sep 14, 1994
filing date -
Sep 14, 1993
priority date (Note) -
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Abstract
Disclosed is a data reading process as well as an improved semiconductor memory device. Input data supplied to the memory device is written in one of memory cells via a pair of bit lines when a write enable signal is active. After writing of the input data is completed, an equalizing circuit is activated to equalize the potential levels of bit lines used in data writing. An output circuit of the memory device is controlled such that the input data is forcibly output as output data from the memory device during the equalization immediately after writing of the input data is completed.
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