Microelectronic packages with dual or multiple-etched flip-chip connectors
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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Dec 11, 2012
Grant Date -
Jan 12, 2012
app pub date -
Jul 8, 2010
filing date -
Jul 8, 2010
priority date (Note) -
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Abstract
A packaged microelectronic element includes a microelectronic element having a front surface and a plurality of first solid metal posts extending away from the front surface. A substrate has a major surface and a plurality of conductive elements exposed at the major surface and joined to the first solid metal posts. In particular examples, the conductive elements can be bond pads or can be second posts having top surfaces and edge surfaces extending at substantial angles away therefrom. Each first solid metal post includes a base region adjacent the microelectronic element and a tip region remote from the microelectronic element, the base region and tip region having respective concave circumferential surfaces. Each first solid metal post has a horizontal dimension which is a first function of vertical location in the base region and which is a second function of vertical location in the tip region.
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