Semiconductor devices including etching stop films
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United States of America Patent
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Dec 8, 2015
Grant Date -
Apr 19, 2012
app pub date -
Sep 23, 2011
filing date -
Oct 13, 2010
priority date (Note) -
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Abstract
A semiconductor device may include a substrate including an NMOS region and a PMOS region. A gate structure can include a gate pattern and a spacer pattern, where the gate structure is on the substrate. A first etching stop film can be on the substrate in the NMOS region and a second etching stop film can be on the substrate in the PMOS region. A contact hole can penetrate the first and second etching stop films and a contact plug can be in the contact hole. A thickness of the first etching stop film can be greater than a thickness of the second etching stop film. Related methods are also disclosed.
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