Wafer back side processing structure and apparatus
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United States of America Patent
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Sep 1, 2015
Grant Date -
Sep 18, 2014
app pub date -
Jun 24, 2013
filing date -
Mar 12, 2013
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Abstract
Disclosed herein is a method of processing a device, comprising providing a substrate having a buffer layer disposed on a back side and forming an outer protection layer over the back side of the buffer layer, forming a thermal layer on the back side of the outer protection layer and heating the substrate through the thermal layer and the back side of the outer protective layer. A back side protection layer may be formed on the back side of the buffer layer. The thermal layer has a thermal emissivity coefficient of about 0.7 or greater and a thickness greater than a roughness of the back side of the outer protection layer. The back side protection layer is an oxide with a thickness between about 20 angstroms and about 50 angstroms. The outer protection layer is a nitride with a thickness between about 50 angstroms and about 300 angstroms.
First Claim
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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
- TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Huang, Ching-Kun | Jhubei, TW | 13 | 200 |
Lee, Song-Bor | Zhubei, TW | 26 | 232 |
Li, Cheng-Chien | Jhubei, TW | 18 | 27 |
Lin, Wei-Chih | Taipei, TW | 96 | 474 |
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