Dominant error correction circuitry for a Viterbi detector

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United States of America Patent

PATENT NO 6581181
SERIAL NO

09538134

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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The apparatus corrects a data detection error caused by baseline wandering in an optical PRML read channel. The apparatus includes error detection circuitry and error correction circuitry. The error detection circuitry monitors a serial output signal from the optical PRML read channel and a first set of input signals to the optical PRML read channel to detect an error event associated with baseline wandering. The error detection circuitry deems the error event to have occurred when three conditions are satisfied. First, a bit sequence represented by the serial output signal matches a first bit sequence associated with the error event. Second, a first difference in a first set of consecutive values represented by the first set of input signals is within a first range of values associated with the error event. Third, a second difference in a second set of consecutive values of the first input signal is within a second range of values associated with the error event. The error detection circuitry responds to satisfaction of all three conditions by asserting an error signal. The error correction circuitry responds to assertion of the error signal by modifying a pair of consecutive bits represented by the serial output signal to generate a corrected output signal having a second bit sequence.

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Patent Owner(s)

  • CSR TECHNOLOGY INC.;OAK TECHNOLOGY, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Sonu, Gene San Jose, CA 10 115

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