Method of manufacturing semiconductor device with a multi-layered gate dielectric

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United States of America Patent

PATENT NO 9984884
SERIAL NO

15385507

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Abstract

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A method of manufacturing a semiconductor device includes forming a first nitride semiconductor layer, forming thereover a second nitride semiconductor layer having a band gap wider than that of the first nitride semiconductor layer, and thereby forming a stacked body, etching the stacked body with a first film placed over the stacked body and including a first opening portion as a mask to form a trench penetrating through the second nitride semiconductor layer and reaching an inside of the first nitride semiconductor layer, causing an end portion of the first film to retreat from an end portion of the trench, forming a second film over the first film including the inside of the trench, and forming a gate electrode over the second film.

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Patent Owner(s)

  • RENESAS ELECTRONICS CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Inoue, Takashi Tokyo, JP 644 7150
Kawaguchi, Hiroshi Tokyo, JP 258 3267
Miura, Yoshinao Tokyo, JP 46 511
Miyamoto, Hironobu Tokyo, JP 115 1970
Nagai, Takayuki Tokyo, JP 146 1580
Nagura, Nobuhiro Tokyo, JP 5 44
Nakayama, Tatsuo Tokyo, JP 90 1818
Okamoto, Yasuhiro Tokyo, JP 208 3493
Takewaki, Toshiyuki Tokyo, JP 62 502

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