Processor for executing highly efficient VLIW
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United States of America Patent
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Jul 4, 2000
Grant Date -
N/A
app pub date -
Jun 12, 1998
filing date -
Jun 16, 1997
priority date (Note) -
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status (Latency Note)
Importance
Abstract
A 32-bit instruction 50 is composed of a 4-bit format field 51, a 4-bit operation field 52, and two 12-bit operation fields 59 and 60. The 4-bit operation field 52 can only include (1) an operation code 'cc' that indicates a branch operation which uses a stored value of the implicitly indicated constant register 36 as the branch address, or (2) a constant 'const'. The content of the 4-bit operation field 52 is specified by a format code provided in the format field 51.
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