Method for testing a semiconductor integrated circuit
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United States of America Patent
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Apr 20, 2004
Issued Date -
N/A
app pub date -
Jul 26, 2002
filing date -
Jul 7, 1999
priority date (Note) -
Expired
status (Latency Note)
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Abstract
In a method of testing a semiconductor integrated circuit, an input signal is applied to the semiconductor integrated circuit. Current passing through the elements of the semiconductor integrated circuit is repeatedly measured while sequentially changing the logical state of the elements. The standard deviation of the currents measured is calculated and a semiconductor integrated circuit is determined to be defective if the standard deviation exceeds a threshold value.
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