Semiconductor integrated circuit device

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United States of America Patent

PATENT NO 11450674
APP PUB NO 20210074713A1
SERIAL NO

16950644

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Abstract

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In a ROM cell using a vertical nanowire (VNW) FET, the gate of the VNW FET is connected with a word line (WL), the bottom thereof is connected with a bit line (BL), and the top thereof is selectively connected with a ground potential line. The bottom of the VNW FET of the ROM cell is connected to the bit line (BL) irrespective of the data stored in the ROM cell.

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Patent Owner(s)

  • SOCIONEXT INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Moriwaki, Shinichi Yokohama, JP 17 97

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