UART aggregation and JTAG selection circuitry for a multi-solid state drive environment

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United States of America Patent

PATENT NO 11809355
APP PUB NO 20220253395A1
SERIAL NO

17169062

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Abstract

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An adaptor device includes a first interface for coupling to a first processor, a second interface for coupling to a second processor, the second interface being different than the first interface, and a plurality of third interfaces, which are different than either the first interface or the second interface. The plurality of third interfaces are configured for coupling to a corresponding plurality of external devices. The adaptor device is configured to receive, at the first interface, a first signal from the first processor. In response to the first signal, the adaptor device couples through the plurality of third interfaces to the plurality of external devices to enable the first processor substantially concurrent access to the plurality of external devices. The adaptor device is also configured to receive, at the first interface, a second signal from the first processor. In response to the second signal, the adaptor device couples the second processor with a selected one of the plurality of external devices.

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Patent Owner(s)

  • SK HYNIX INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Xiaofang San Jose, US 15 142
Ganesh, Akshay San Jose, US 1 2
Lanka, Priyadarsini San Jose, US 2 41
Nguyen, Lock Duc Morgan Hill, US 3 3
Zheng, Ping San Jose, US 69 560

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