Integrated packet bus with enhanced bandwidth
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United States of America Patent
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Feb 1, 2005
Issued Date -
N/A
app pub date -
Apr 26, 2001
filing date -
Feb 12, 2001
priority date (Note) -
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status (Latency Note)
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Abstract
A communications system includes a communications device, an enhanced integrated packet bus, and an integrated packet bus controller. The communications system may be a riser card, including communications devices such as DSL, HomePNA and LAN devices. The bus supports additional data signals designated for carrying additional data, wherein a portion of such data may be differentially encoded. The bus is capable of supporting two or more communications devices. The bus supports a communications protocol, which includes a control slot and data slots. Each bit of the control slot selects which of the data slot bits belongs to which of the communications devices. For example, with two communications devices, a 16-bit control slot can be filled with the bit pattern '0000111111111111' which indicates that the first 4 bits of the 16-bit data slot belong to the first communications device and the second 12 bits belong to the second communications device.
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