Semiconductor integrated circuit with an improved macro cell pattern

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United States of America Patent

PATENT NO 4972324
SERIAL NO

07282802

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Abstract

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A semiconductor integrated circuit having a data path including k macro cells, each macro cell for processing data of different widths. Each macro cell consists of a plurality of leaves, each leaf performing data processing on one bit of data. The semiconductor integrated circuit is laid out in a rectangular pattern so that leaves of a macro cell processing j.times.n bit wide data are l/j as wide as leaves of a macro cell executing n bit wide data.

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Patent Owner(s)

  • KABUSHIKI KAISHA TOSHIBA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Tanaka, Shigeru Fujisawa, JP 384 8077

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