Pipeline analog-to-digital conversion system using a modified coding scheme and method of operation
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United States of America Patent
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Apr 24, 2001
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app pub date -
Apr 23, 1999
filing date -
Apr 24, 1998
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Abstract
A pipeline analog-to-digital conversion system (10) includes a plurality of cascaded subconverter stages (12) and a digital correction unit (16). Each subconverter stage (12) includes an n-bit analog-to-digital converter (26), an n-bit digital-to-analog converter (28), and an arithmetic unit (32). The n-bit analog-to-digital converter (26) generates a second intermediate digital signal (18) as a function of a first input analog signal (24) and a corresponding first intermediate digital signal (18) received from a previous stage (12).
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