Interconnection process
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United States of America Patent
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-
Dec 1, 2009
Grant Date -
Dec 4, 2008
app pub date -
Jun 1, 2007
filing date -
Jun 1, 2007
priority date (Note) -
In Force
status (Latency Note)
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Abstract
An interconnection process is provided. The process includes the following steps. Firstly, a semiconductor base having at least a electrical conductive region is provided. Next, a dielectric layer with a contact hole is formed to cover the semiconductor base, wherein the contact hole exposes part of the electrical conductive region. Then, a thermal process is performed on the semiconductor base covered with the dielectric layer. Lastly, a conductive layer is formed on the dielectric layer, wherein the conductive layer is electrically connected to the electrical conductive region through the contact hole.
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