Memory device for performing program verify operation and method of operating the same
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
May 17, 2022
Grant Date -
Nov 25, 2021
app pub date -
Oct 20, 2020
filing date -
May 21, 2020
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
Provided herein may be a memory device and a method of operating the same. The memory device may include a plurality of cell strings, a peripheral circuit, and control logic. Each of the cell strings includes a drain select transistor, a source select transistor, and a plurality of memory cells that are coupled in series between the drain select transistor and the source select transistor. The peripheral circuit may be configured to perform a program operation and a program verify operation on a cell string that is selected from among the plurality of cell strings. The control logic may be configured to control the peripheral circuit to boost a channel voltage of at least one unselected cell string, among the plurality of cell strings, based on a comparison between a degree of progress of the program operation and a reference degree of progress during the program verify operation.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully