Interface circuit and method of testing or debugging semiconductor device using it
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United States of America Patent
Stats
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Mar 17, 2009
Grant Date -
Sep 19, 2002
app pub date -
Mar 15, 2002
filing date -
Mar 16, 2001
priority date (Note) -
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status (Latency Note)
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Abstract
An interface circuit includes a selection circuit receiving first and second signals, generating a time division serial signal by selecting one of the first and second signals in response to the voltage level of a clock signal provided from the outside of a semiconductor device, and outputting the time division serial signal to a single input terminal of the semiconductor device via a single signal line, a first holding circuit, which is connected to the terminal for receiving the time division serial signal, for capturing and outputting the first signal of the time division serial signal in response to the rise of the clock signal, and a second holding circuit, which is connected to the terminal for receiving the time division serial signal, for capturing and outputting the second signal of the time division serial signal in response to the fall of the clock signal.
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