Vertical thing-film transistor and application as bit-line connector for 3-dimensional memory arrays
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United States of America Patent
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Jul 26, 2022
Grant Date -
Aug 13, 2020
app pub date -
Feb 10, 2020
filing date -
Feb 11, 2019
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Abstract
A memory circuit includes: (i) a semiconductor substrate having a planar surface, the semiconductor substrate having formed therein circuitry for memory operations; (ii) a memory array formed above the planar surface, the memory array having one or more electrodes to memory circuits in the memory array, the conductors each extending along a direction substantially parallel to the planar surface; and (iii) one or more transistors each formed above, alongside or below a corresponding one of the electrodes but above the planar surface of the semiconductor substrate, each transistor (a) having first and second drain/source region and a gate region each formed out of a semiconductor material, wherein the first drain/source region, the second drain/source region or the gate region has formed thereon a metal silicide layer, and (b) selectively connecting the corresponding electrode to the circuitry for memory operations.
First Claim
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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
- SUNRISE MEMORY CORPORATION
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Chien, Wu-Yi Henry | San Jose, US | 35 | 554 |
Harari, Eli | Saratoga, US | 109 | 3711 |
Herner, Scott Brad | Lafayette, US | 134 | 2559 |
Yan, Tianhong | Saratoga, US | 74 | 1146 |
Zhou, Jie | San Jose, US | 268 | 2401 |
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