Semiconductor device and method of producing the same

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United States of America Patent

PATENT NO 6404009
SERIAL NO

09514591

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Abstract

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A semiconductor device, that is, transistor, of a high withstand voltage having a LOCOS offset drain, which can cause complete depletion of a drift region and achieve both of an improvement in the junction breakdown voltage and a decrease in the on-resistance, and a method of producing the same. A semiconductor device comprising at least a p-type substrate, an n-type epitaxial layer formed on it, a p-well formed in the surface layer of the n-type epitaxial layer, an n-type source region formed in the surface layer of the p-well, an n-type drain region formed next to the drain region via an element isolation layer (LOCOS), and a gate electrode formed on the n-type source region and the element isolation layer, in which device a p-type buried layer containing an impurity in a higher concentration than that of the p-type substrate is formed, except just below the n-type drain region, in a surrounding pattern around the n-type drain region, and a method of producing the same.

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Patent Owner(s)

  • SONY CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Mori, Hideki Kanagawa, JP 113 1079

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