Neighboring gate-all-around integrated circuit structures having disjoined epitaxial source or drain regions

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United States of America Patent

PATENT NO 11862635
APP PUB NO 20220320085A1
SERIAL NO

17846439

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Abstract

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Neighboring gate-all-around integrated circuit structures having disjoined epitaxial source or drain regions, and methods of fabricating neighboring gate-all-around integrated circuit structures having disjoined epitaxial source or drain regions, are described. For example, a structure includes first and second vertical arrangements of nanowires, the nanowires of the second vertical arrangement of nanowires having a horizontal width greater than a horizontal width of the nanowires of the first vertical arrangement of nanowires. First and second gate stacks are over the first and second vertical arrangements of nanowires, respectively. First epitaxial source or drain structures are at ends of the first vertical arrangement of nanowires, and second epitaxial source or drain structures are at ends of the second vertical arrangement of nanowires. An intervening dielectric structure is between neighboring ones of the first epitaxial source or drain structures and of the second epitaxial source or drain structures.

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Patent Owner(s)

  • INTEL CORP.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ghani, Tahir Portland, US 694 6970
Guha, Biswajeet Hillsboro, US 116 284
Guler, Leonard P Hillsboro, US 132 69
Sivakumar, Swaminathan Beaverton, US 85 661

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