Semiconductor device and method of manufacturing the same

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5852328
SERIAL NO

08795427

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ATTORNEY / AGENT: (SPONSORED)

Importance

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Abstract

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After forming a first wire on a first interlayer insulation film, a second interlayer insulation film is formed and planarized, to thereby form a via hole. At this stage, the via hole is formed off the first wire. Next, after making an exposed edge and an exposed side wall of the first wire slanted surfaces, a second wire is formed with or without a conductive film buried within the via hole. Since the side wall of the first wire is a slanted surface in this manner, it is possible to completely bury a wire material of the second wire or the conductive film within the via hole, and therefore, it is possible to ensure electric conduction all over the slanted surfaces of the first wire. As a result, even if the via hole which connects the first wire in a lower layer and the second wire in an upper layer is formed of f the first wire, an increase in a wire resistance in the via hole is prevented.

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Patent Owner(s)

  • MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.;RESOLVE 2000, INC.

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Nishimura, Hiroshi Toyama, JP 197 3100
Ogawa, Shinichi Osaka, JP 78 500

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