Laminated substrate manufacturing method and laminated substrate manufactured by the method
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United States of America Patent
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Dec 28, 2010
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app pub date -
Aug 24, 2006
filing date -
Aug 25, 2005
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Abstract
Adhesion of particles due to static buildup during a laminated substrate manufacturing process is constrained, so as to reduce generation of a void or a blister in a lamination step and improve yield. A laminate 13 is formed by superimposing a first semiconductor substrate 11, which is to be an active layer, on a second semiconductor substrate 12, which is to be a supporting substrate, via an oxide film 11a. Electric resistance of either or both of the first and second semiconductor substrates 11 and 12 before superimposition is 0.005-0.2 .OMEGA.cm.
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