Multilayer printed circuit board
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United States of America Patent
Stats
-
Aug 1, 2006
Grant Date -
Nov 20, 2003
app pub date -
Apr 8, 2003
filing date -
May 15, 2002
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A multilayer printed circuit board is provided in which microcracks or metallic migration is mitigated when a Resin Fill Plated Through Hole (RFP) is arranged near the edge thereof. The multilayer printed circuit board includes an inner layer having an RFP, outer layers, RFP lands, and conductor layers. The conductor layers are positioned over the RFP lands and the outer edges of the conductor layers extends outward further than the outer edges of the RFP lands. When the multilayer printed circuit board is heated, a stress is generated in and near the RFP. The conductor layers positioned so as to cover the RFP lands, exert a reaction against the stress to suppress generation of microcracks in the multilayer printed circuit board and thereby mitigate metallic migration in the board.
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