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United States of America Patent

PATENT NO 10629134
APP PUB NO 20190280022A1
SERIAL NO

16420430

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Abstract

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It is an object to decrease the number of transistors connected to a capacitor. In a structure, a capacitor and one transistor are included, one electrode of the capacitor is connected to a wiring, and the other electrode of the capacitor is connected to a gate of the transistor. Since a clock signal is input to the wiring, the clock signal is input to the gate of the transistor through the capacitor. Then, on/off of the transistor is controlled by a signal which synchronizes with the clock signal, so that a period when the transistor is on and a period when the transistor is off are repeated. In this manner, deterioration of the transistor can be suppressed.

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Patent Owner(s)

Patent OwnerAddress
SEMICONDUCTOR ENERGY LABORATORY CO LTD398 HASE ATSUGI-SHI KANAGAWA-KEN 243-0036

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Umezaki, Atsushi Kanagawa, JP 327 8081

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