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Abstract

A method of fabricating a semiconductor device including the following steps of: forming a first insulating layer, a first conductive layer and a stopper layer over a semiconductor layer; forming a mask insulating layer on the first conductive layer in a logic circuit region; forming a conductive layer in a formation region of word gate layers and common contact sections and forming gate electrodes; anisotropically etching the second conductive layer to form control gates in the shape of sidewalls and a conductive layer of the common contact sections, in a memory region; and patterning the third conductive layer and the first conductive layer to form word gates and word lines.

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First Claim