DMOS device having a trenched bus structure

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United States of America Patent

PATENT NO 7265024
SERIAL NO

11329870

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Abstract

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A DMOS device having a trench bus structure thereof is introduced. The trench bus structure comprises a field oxide layer formed on a P substrate, and a trench extending from an top surface of the field oxide layer down to a lower portion of the P substrate. A gate oxide layer and a polysilicon bus are formed to fill the trench as a main portion of the bus structure. In addition, an isolation layer and a metal line are formed atop the polysilicon bus and the field oxide layer. An opening is formed in the isolation layer to form connections between the polysilicon bus and the metal line. In specific embodiments, the bus trench and the gate trenches of the DMOS device are formed simultaneously, and the polysilicon bus and the gate electrode are formed simultaneously as well. Therefore, the bus structure is able to form the DMOS transistor without demanding any lithographic step for defining the position of the polysilicon bus.

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Patent Owner(s)

  • PROMOS TECHNOLOGIES INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chang, Chien-Ping Hsinchu, TW 17 62
Chuang, Chiao-Shun Hsinchu, TW 31 147
Hsieh, Hsin-Huang Hsinchu, TW 8 38
Tseng, Mao-Song Hsinchu, TW 18 85

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