Apparatus for high data rate synchronous interface using a delay locked loop to synchronize a clock signal and a method thereof
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United States of America Patent
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Jul 12, 2005
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N/A
app pub date -
Sep 7, 2000
filing date -
Sep 7, 2000
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Abstract
A reference signal input of a delay locked loop is connected to receive a reference clock. The delay locked loop provides a drive clock that drives a clock distribution tree. One of the endpoints of the clock distribution tree is connected to a feedback reference of the delay locked loop. By using one the endpoints as a feedback loop to the delay locked loop the signal received at components attached to the endpoints of the distribution tree can be synchronized to the reference input received at the delay locked loop.
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